Search the 316 jobs at Intel Corporation

The Operation Manager in the supply chain department is responsible for translating business requirements into actionable strategies and tactics. They work closely with factory customers and other partner groups to gather and clarify business requirements, identify opportunities/issues, and create plans. Their responsibilities include managing bills of materials, inventory optimization, supply chain reliability, and cost control. The ideal candidate should have strong analytical, communication, and partnership skills.

Design and automate a scalable, secure, and high-performance core service layer integrated with cloud orchestration and monitoring. Responsible for code authoring and deployment automation.

Seeking a Senior Layout Methodology and Integration Engineer to work on Test Chip Lead Vehicles for Intel's next generation technology development. Responsibilities include developing layout design methodology, full chip integration, tapeins, and engaging with manufacturing partners on cutting-edge process nodes.

Seeking a Layout Methodology and Integration Engineer to work on Test Chip Lead Vehicles for Intel's next generation technology development. Responsibilities include developing layout design methodology, converging SoC layouts, and ensuring tape-out requirements are met. Entry-level position with a focus on custom layout domain.

Design and develop Identity and Access Management solutions for B2B and B2C users. Serve as a Subject Matter Expert in global IAM services and solutions. Strong development capabilities in Go or Python are preferred.

Develop logic design, RTL coding, and simulation for SoC design. Integrate logic of IP blocks and subsystems. Review verification plan and implementation. Collaborate with IP providers for SoC integration. Drive quality assurance compliance for IP-SoC handoff.

The Regional Sales Lead will drive Business Development engagement and collaboration with Amazon AWS, focusing on accelerating the adoption of solutions across various workloads. This commissioned sales position will lead efforts to drive cloud consumption revenue in the AMERICAS region through strategic alliances and joint GTM strategies.

Develop test plans, create test estimates, implement test automation frameworks, work closely with developers, define standard testing methodologies, support CI/CD, and track ROI of test automation. Bachelor's degree in Electrical/Computer Engineering or Computer Science and 4+ years of experience required.

Yield Analysis engineer position in Intel's Advanced Packaging (AP) technologies division focusing on EMIB/FOVEROS TD team. Responsibilities include analyzing, summarizing sort data, determining actions for yield improvement, developing process improvements, and collaborating with various teams. Candidate must have a bachelor's or master's degree in related fields with 3+ years of technical experience in fab interconnect and 4+ years in yield analysis.

Individual Contributor role in Integration Engineering at Intel's New Mexico Foundry Operations. Responsibilities include process integration development, data analysis, experiment design, and problem-solving. Requires 4+ years of experience in semiconductor materials, fabrication, SPC, DOE principles, and engineering analysis tools.

Join Intel's Advanced Packaging team as a Device Engineer working on EMIB/FOVEROS technology development. Responsibilities include analyzing e-test data, optimizing device performance, and leading continuous improvement activities. Must have a bachelor's or master's degree in a related field and 3+ years of fab interconnect expertise.

Intel Graphics Team is seeking a Graphics Hardware Engineer to work on GPU, Multi-Media, and Display IP. Responsibilities include power analysis, optimization, scripting, and collaboration with others. Preferred qualifications include knowledge of ASIC design flow, scripting languages, low power design, and analytical skills.

As an EDA Tools Software Engineer in the Test Chip Engineering group at Intel, you will develop runset and validation methodologies for Test Structure Design Rule Check to support design of Intel's next generation process technology and yield test chips. Responsibilities include developing design rule check software, validating test chip layout design, collaborating with process technologists, and troubleshooting design issues. This is an entry-level position with a focus on computer engineering, electrical engineering, and computer science.

Seeking an experienced software developer to design, develop, and support software control systems used to automate factory equipment in manufacturing facilities worldwide. Responsibilities include analyzing customer requirements, designing software solutions, creating robust applications, and providing expert support to factory technicians.

Senior Defect Reduction Engineer responsible for collaborating with various teams to achieve yield ramp-up and process optimization in early production stages for Intel silicon production. Must have 5+ years' experience in the advanced node semiconductor industry in Defect engineering and a Bachelor's Degree in a STEM field.

Looking for a dynamic, strategic professional to drive an aligned approach to consumption data. Responsible for creating a multi-year consumption data strategy, overseeing projects, defining KPIs, delivering reports, and determining system requirements. Must have strong communication skills and experience managing complex initiatives. Bachelor's degree with 6+ years of experience or master's degree with 4+ years of experience required.

Intel is seeking a Physical Design Engineer Intern to work on test chip integration, SoC design flow, and collaboration with cross-functional teams to deliver innovative solutions. Responsibilities include floor planning, synthesis, timing analysis, place and route, verification, and design signoff flows. Ideal candidate possesses analytical skills, communication skills, teamwork abilities, and a learning mindset.

End-to-End Business Analyst role at Intel focusing on aligning business requirements and process designs to enable the IDM 2.0 strategy.

The PDM Business Administrator will be responsible for managing Intel's Windchill environment and providing support in various areas like user account management, context administration, data migration, CAD data management, and end user training. The role also involves responsibilities in areas like architecture, business process mapping, data migration, license management, purging, and performance monitoring.

Undergraduate internship in physical design engineering within the Xeon Engineering Group, focusing on next-generation Xeon products/IPs for server markets with AI integration. Responsibilities include block-level floor planning, logic synthesis, AI utilization, verification tasks, and assisting in SOC development. Candidate must be pursuing a bachelor's degree in electrical or computer engineering or related field.